AD8186 View Datasheet(PDF) - Analog Devices

Part Name

Description

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AD8186

HDMI/DVI Switch

Analog Devices 

AD8186/AD8187

AC-Coupled Inputs (DC Restore before Mux Input)

Using ac-coupled inputs presents an interesting challenge for video

systems operating from a single 5 V supply. In NTSC and PAL

video systems, 700 mV is the approximate difference between the

maximum signal voltage and black level. It is assumed that sync

has been stripped. However, given the two pathological cases

shown in Figure 7, a dynamic range of twice the maximum signal

swing is required if the inputs are to be ac-coupled. A possible

solution would be to use a dc restore circuit before the mux.

+700mV

VAVG

VREF

BLACK LINE WITH WHITE PIXEL

WHITE LINE WITH BLACK PIXEL

VREF

VAVG

–700mV

VSIGNAL

+5 V

GND

VINPUT = V REF + V SIGNAL

VREF ~ V AVG

VREF IS A DC VOLTAGE

SET BY THE RESISTORS

Figure 7. Pathological Case for

Input Dynamic Range

Tolerance to Capacitive Load

Op amps are sensitive to reactive loads. A capacitive load at the

output appears in parallel with an effective resistance of REFF =

(RLʈrO), where RL is the discrete resistive load, and rO is the open-

loop output impedance, approximately 15 Ω for these muxes.

The load pole, at fLOAD = 1/(2␲ REFF CL), can seriously degrade

phase margin and therefore stability. The old workaround is to

place a small series resistance directly at the output to isolate the

load pole. While effective, this ruse also affects the dc and termina-

tion characteristics of a 75 Ω system. The AD8186 and AD8187

are built with a variable compensation scheme that senses the

output reactance and trades bandwidth for phase margin, ensuring

faster settling and lower overshoot at higher capacitive loads.

Secondary Supplies and Supply Bypassing

The high current output transistors are given their own supply

pins (Pins 15, 17, 19, and 21) to reduce supply noise on-chip

and to improve output isolation. Since these secondary, high

current supply pins are not connected on-chip to the primary

analog supplies (VCC/VEE, Pins 6, 7, 9, 11, 13, and 24), some

care should be taken to ensure that the supply bypass capacitors

are connected to the correct pins. At a minimum, the primary

supplies should be bypassed. Pin 6 and Pin 7 may be a convenient

place to accomplish this. Stacked power and ground planes could

be a convenient way to bypass the high current supply pins.

IN0A 1

24 VCC

DGND 2

IN1A 3

23 OE

22 SEL A/B

VREF 4

IN2A 5

21 VCC

20 OUT 0

0.1␮F

VCC 6

VEE 7

1␮F

IN2B 8

MUX0

MUX1

19 VEE

18 OUT 1

17 VCC

VEE 9

IN1B 10

VEE 11

IN0B 12

MUX2

16 OUT 2

15 VEE

14 DVCC

13 VCC

Figure 8. Detail of Primary and Secondary Supplies

Split-Supply Operation

Operating from split supplies (e.g., +3 V/–2 V or ± 2.5 V) simpli-

fies the selection of the VREF voltage and load resistor termination

voltage. In this case, it is convenient to tie VREF to ground.

The logic inputs are level shifted internally to allow the digital

supplies and logic inputs to operate from 0 V and 5 V when

powering the analog circuits from split supplies. The maximum

voltage difference between DVCC and VEE must not exceed 8 V

(see Figure 9).

SPLIT-SUPPLY OPERATION

DIGITAL SUPPLIES

(+5)

DVCC

ANALOG SUPPLIES

(+2.5)

VCC

8V MAX

(0V)

DGND

(–2.5)

VEE

Figure 9. Split-Supply Operation

–14–

REV. A

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