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AD2S82ALP View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
AD2S82ALP Variable Resolution, Monolithic Resolver-to-Digital Converters ADI
Analog Devices ADI
AD2S82ALP Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD2S81A/AD2S82A
RECOMMENDED OPERATING CONDITIONS
Power Supply Voltage (+VS to –VS) . . . . . . . . . ± 12 V dc ± 10%
Power Supply Voltage VL . . . . . . . . . . . . . . . . . . +5 V dc ± 10%
Analog Input Voltage (SIN and COS) . . . . . . . . 2 V rms ± 10%
Analog Input Voltage (REF) . . . . . . . . . . . . . . 1 V to 8 V peak
Signal and Reference Harmonic Distortion . . . . . . . 10% (max)
Phase Shift Between Signal and Reference . ± 10 Degrees (max)
Ambient Operating Temperature Range
Commercial (JD) . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial (HP, JP, KP, LP) . . . . . . . . . . . . –40°C to +85°C
PIN FUNCTION DESCRIPTIONS
Mnemonic
Description
REFERENCE I/P Reference Signal Input
DEMOD I/P
Demodulator Input
AC ERROR O/P
COS I/P
Ratio Multiplier Output
Cosine Input
ANALOG GND Power Ground
SIGNAL GND
Resolver Signal Ground
SIN I/P
Sine Input
+VS
DB1–DB16
Positive Power Supply
Parallel Output Data
+VL
ENABLE
Logic Power Supply
Logic Hi-Output Data in High Impedance
State Logic Lo Present Data to the Output Latches
BYTE SELECT Logic Hi-Most Significant Byte to DB1–DB8
INHIBIT
DIGITAL GND
Logic Lo-Most Significant Byte to DB1–DB8
Logic Lo Inhibits Data Transfer to Output Latches
Digital Ground
SC1–SC2*
Select Converter Resolution
DATA LOAD*
Logic Lo DB1–DB16 Inputs
Logic Hi DB1–DB16 Outputs
BUSY
DIR
Converter Busy, Data Not Valid While Busy Hi
Logic State Defines Direction of Input Signal Rotation
RIPPLE CLK
Positive Pulse when Converter Output Changes from
–VS
VCO I/P
1s to All 0s or Vice Versa
Negative Power Supply
VCO Input
INTEGRATOR I/P Integrator Input
INTEGRATOR O/P Integrator Output
DEMOD O/P
Demodulator Output
COMPLEMENT* Active Logic Lo
VCO O/P*
VCO Output
*AD2S82A Only.
Bit Weight Table
Binary
Bits (N)
Resolution Degrees
(2N)
/Bit
Minutes
/Bit
Seconds
/Bit
0
1
360.0
21600.0
1296000.0
1
2
180.0
10800.0
648000.0
2
4
90.0
5400.0
324000.0
3
8
45.0
2700.0
162000.0
4
16
22.5
1350.0
81000.0
5
32
11.25
675.0
40500.0
6
64
5.625
337.5
20250.0
7
128
2.8125
168.75
10125.0
8
256
1.40625
84.375
5062.5
9
512
0.703125
42.1875
2531.25
10
1024
0.3515625
21.09375
1265.625
11
2048
0.1757813
10.546875
632.8125
12
4096
0.0878906
5.273438
316.40625
13
8192
0.0439453
2.636719
158.20313
14
116384
0.0219727
1.318359
79.10156
15
32768
0.0109836
0.659180
39.55078
16
65536
0.0054932
0.329590
19.77539
17
131072
0.0027466
0.164795
9.88770
18
262144
0.0013733
0.082397
4.94385
ABSOLUTE MAXIMUM RATINGS1 (with respect to GND)
+VS2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +14 V dc
–VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –14 V dc
+VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VS
Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +14 V to –VS
SIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +14 V to –VS
COS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +14 V to –VS
Any Logical Input . . . . . . . . . . . . . . . . . . . –0.4 V dc to +VL dc
Demodulator Input . . . . . . . . . . . . . . . . . . . . . . . +14 V to –VS
Integrator Input . . . . . . . . . . . . . . . . . . . . . . . . . . +14 V to –VS
VCO Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +14 V to –VS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 860 mW
Operating Temperature
Commercial (JD) . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial (HP, JP, KP, LP) . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature (All Grades) . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300°C
CAUTION
1. Absolute Maximum Ratings are those values beyond which damage to the
device may occur.
2. Correct polarity voltages must be maintained on the +V S and –VS pins.
AD2S81A/AD2S82A PIN CONFIGURATIONS
REFERENCE I/P 1
28 DEMOD O/P
DEMOD I/P 2
27 INTEGRATOR O/P
AC ERROR O/P 3
26 INTEGRATOR I/P
COS I/P 4
25 VCO I/P
ANALOG GND
SIN I/P
+VS
MSB DB1
5
24 –VS
6 AD2S81A 23 RIPPLE CLK
7 TOP VIEW 22 DIR
8 (Not to Scale) 21 BUSY
DB2 9
20 DIGITAL GND
DB3 10
19 INHIBIT
DB4 11
18 BYTE SELECT
DB5 12
17 ENABLE
DB6 13
DB7 14
16 +VL
15 DB8 LSB
SIN O/P 7
+VS 8
NC 9
MSB DB1 10
DB2 11
DB3 12
DB4 13
DB5 14
DB6 15
DB7 16
DB8 17
6 5 4 3 2 1 44 43 42 41 40
PIN 1
IDENTIFIER
AD2S82A
TOP VIEW
(Not to Scale)
39 –VS
38 RIPPLE CLK
37 DIR
36 BUSY
35 DATA LOAD
34 COMPLEMENT
33 SC2
32 SC1
31 DIGITAL GND
30 INHIBIT
29 NC
18 19 20 21 22 23 24 25 26 27 28
NC = NO CONNECT
REV. B
–5–
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