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AD2S82A View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
AD2S82A Variable Resolution, Monolithic Resolver-to-Digital Converters ADI
Analog Devices ADI
AD2S82A Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD2S81A/AD2S82A
BUSY
RIPPLE
CLK
DATA
INHIBIT
VH
VH
VH
t1
t2 VH
t4
VH
VH
VL
t5
VL
t6
VH
DIR
t7
VL
INHIBIT
t8
t9
VL
ENABLE
DATA
BYTE
SELECT
VL
VZ
t10
t11
VL
DATA
t12
VL
t3
VH
VL
VH
VH
t13
VL
PARAMETER
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
TMIN
TMAX
CONDITION
200
600
BUSY WIDTH VH–VH
10
25
RIPPLE CLOCK VH TO BUSY VH
470
580
RIPPLE CLOCK VL TO NEXT BUSY VH
16
45
BUSY VH TO DATA VH
3
25
BUSY VH TO DATA VL
70
140
INHIBIT VH TO BUSY VH
485
625
MIN DIR VH TO BUSY VH
515
670
MIN DIR VH TO BUSY VH
600
INHIBIT VL TO DATA STABLE
40
110
ENABLE VL TO DATA VH
35
110
ENABLE VL TO DATA VL
60
140
BYTE SELECT VL TO DATA STABLE
60
125
BYTE SELECT VH TO DATA STABLE
Figure 3. Digital Timing
CIRCUIT FUNCTIONS AND DYNAMIC
PERFORMANCE
The AD2S81A/AD2S82A allows the user greater flexibility in
choosing the dynamic characteristics of the resolver-to-digital
conversion to ensure the optimum system performance. The
characteristics are set by the external components shown in
Figure 1, and the Component Selection section explains how to
select desired maximum tracking rate and bandwidth values.
The following paragraphs explain in greater detail the circuit of
the AD2S81A/AD2S82A and the variations in the dynamic
performance available to the user.
Loop Compensation
The AD2S81A and AD2S82A (connected as shown in Figure
1a and 1b) operates as a type 2 tracking servo loop where the
VCO/counter combination and integrator perform the two inte-
gration functions inherent in a type 2 loop.
Additional compensation in the form of a pole/zero pair is re-
quired to stabilize any type 2 loop to avoid the loop gain charac-
teristic crossing the 0 dB axis with 180° of additional phase lag,
as shown in Figure 6. This compensation is implemented by the
integrator components (R4, C4, R5, C5).
The overall response of such a system is that of a unity gain
second order low pass filter, with the angle of the resolver as the
input and the digital position data as the output.
The AD2S81A/AD2S82A does not have to be connected as
tracking converter, parts of the circuit can be used indepen-
dently. This is particularly true of the Ratio Multiplier which
can be used as a control transformer (see Application Note).
A block diagram of the AD2S81A/AD2S82A is given in
Figure 4.
sin sin t
cos sin t
AC ERROR
RATIO
MULTIPLIER
PHASE-
SENSITIVE
A1 sin () sin t DEMODULATOR
R5 C5
C4
R4
INTEGRATOR
DIGITAL
CLOCK
R6
DIRECTION
VCO
Figure 4. AD2S81A/AD2S82A Functional Diagram
VELOCITY
–10–
REV. B
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