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AD2S80AUE View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
AD2S80AUE Variable Resolution, Monolithic Resolver-to-Digital Converter ADI
Analog Devices ADI
AD2S80AUE Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD2S80A–SPECIFICATIONS (typical at 25؇C unless otherwise noted)
Parameter
SIGNAL INPUTS
Frequency
Voltage Level
Input Bias Current
Input Impedance
Maximum Voltage
REFERENCE INPUT
Frequency
Voltage Level
Input Bias Current
Input Impedance
CONTROL DYNAMICS
Repeatability
Allowable Phase Shift
Tracking Rate
Bandwidth1
ACCURACY
Angular Accuracy
Monotonicity
Missing Codes (16-Bit Resolution)
VELOCITY SIGNAL
Linearity
Reversion Error
DC Zero Offset2
DC Zero Offset Tempco
Gain Scaling Accuracy
Output Voltage
Dynamic Ripple
Output Load
INPUT/OUTPUT PROTECTION
Analog Inputs
Analog Outputs
DIGITAL POSITION
Resolution
Output Format
Load
INHIBIT3
Sense
Time to Stable Data
ENABLE3
ENABLE Time
BYTE SELECT3
Sense
LOGIC LO
Time to Data Available
SHORT CYCLE INPUTS
SC1 SC2
00
01
10
11
Conditions
Min
Typ
50
1.8
2.0
60
1.0
50
1.0
60
1.0
(Signals to Reference)
10 Bits
12 Bits
14 Bits
16 Bits
User Selectable
A, J, S
B, K, T
L, U
Guaranteed Monotonic
A, B, J, K, S, T
L, U
Over Full Range
1 mA Load
Mean Value
–10
±1
±1
–22
±8
±9
Overvoltage Protection
±8
Short Circuit O/P Protection
± 5.6
±8
10, 12, 14, and 16
Bidirectional Natural Binary
Logic LO to Inhibit
Logic LO Enables Position
Output. Logic HI Outputs in
High Impedance State
35
MS Byte DB1–DB8,
LS Byte DB9–DB16
LS Byte DB1–DB8,
LS Byte DB9–DB16
60
Internally Pulled High
(100 k) to +VS
10 Bit
12 Bit
14 Bit
16 Bit
Max
20,000
2.2
150
8
20,000
8.0
150
1
+10
1040
260
65
16.25
Unit
Hz
V rms
nA
M
V pk
Hz
V pk
nA
M
LSB
Degrees
rps
rps
rps
rps
؎8 +1 LSB
؎4 +1 LSB
؎2 +1 LSB
4
1
؎3
±2
6
± 10
± 10.5
1.5
1.0
± 10.4
arc min
arc min
arc min
Codes
Code
% FSD
% FSD
mV
µV/°C
% FSD
V
% rms O/P
k
V
mA
3
LSTTL
600
ns
110
ns
140
ns
–2–
REV. B
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