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A43L2632 View Datasheet(PDF) - AMIC Technology

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Description
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A43L2632 Datasheet PDF : 43 Pages
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A43L2632
Preliminary
1M X 32 Bit X 4 Banks Synchronous DRAM
Features
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks / Pulse RAS
MRS cycle with address key programs
- CAS Latency (2,3)
- Burst Length (1,2,4,8 & full page)
- Burst Type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the
system clock
Deep Power Down Mode
Burst Read Single-bit Write operation
Clock Frequency (max) : 166MHz @ CL=3 (-6)
143MHz @ CL=3 (-7)
General Description
The A43L2632 is 67,108,864 bits Low Power synchronous
high data rate Dynamic RAM organized as 4 X 1,048,576
words by 32 bits, fabricated with AMIC’s high performance
CMOS technology. Synchronous design allows precise
cycle control with the use of system clock. I/O transactions
DQM for masking
Auto & self refresh
64ms refresh period (4K cycle)
Self refresh with programmable refresh period through
EMRS cycle
Programmable Power Reduction Feature by partial array
activation during Self-refresh through EMRS cycle
86 Pin TSOP (II)
operating temperature range: 0ºC to + 70ºC
are possible on every clock cycle. Range of operating
frequencies, programmable latencies allows the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.
PRELIMINARY (January, 2005, Version 0.0)
1
AMIC Technology, Corp.
 

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