A43L8316A View Datasheet(PDF) - AMIC Technology

Part Name

Description

View to exact match

A43L8316A

128K X 16 Bit X 2 Banks Synchronous DRAM

AMIC Technology 

A43L8316A

Write Interrupted by Precharge Command & Write Burst Stop Cycle (@ Burst Length = Full Page)

0

CLOCK

CKE

CS

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19

High

RAS

CAS

ADDR

RAa

CAa

CAb

BA

A8/AP

RAa

WE

DQM

DQ

* Note 1

tBDL

* Note 2

DAa0 DAa1 DAa2 DAa3 DAa4

* Note 1

tRDL

* Note 3

DAb0 DAb1 DAb2 DAb3 DAb4 DAb5

Row Active

(A-Bank)

Write

(A-Bank)

Burst Stop

Write

(A-Bank)

Precharge

(A-Bank)

: Don't care

* Note : 1. At full page mode, burst is wrap-around at the end of burst. So auto precharge is impossible.

2. Data-in at the cycle of burst stop command cannot be written into corresponding memory cell.

It is defined by AC parameter of tBDL(=1CLK).

3. Data-in at the cycle of interrupted by precharge cannot be written into the corresponding memory cell.

It is defined by AC parameter of tRDL(=2CLK).

DQM at write interrupted by precharge command is needed to ensure tRDL of 2CLK.

DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst.

Input data after Row precharge cycle will be masked internally.

4. Burst stop is valid only at every burst length.

(September, 2003, Version 1.0)

34

AMIC Technology, Corp.

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