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93AA56CT-EST View Datasheet(PDF) - Microchip Technology

Part Name
Description
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93AA56CT-EST
Microchip
Microchip Technology Microchip
93AA56CT-EST Datasheet PDF : 0 Pages
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.6 ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX56A/B/C powers up in the ERASE/WRITE
Disable (EWDS) state. All Programming modes must be
preceded by an ERASE/WRITE Enable (EWEN) instruc-
tion. Once the EWEN instruction is executed, program-
ming remains enabled until an EWDS instruction is
executed or Vcc is removed from the device.
To protect against accidental data disturbance, the
EWDS instruction can be used to disable all ERASE/
WRITE functions and should follow all programming
operations. Execution of a READ instruction is indepen-
dent of both the EWEN and EWDS instructions.
FIGURE 2-5:
EWDS TIMING
TCSL
CS
CLK
DI
1
0
0
0
0
X
•••
X
FIGURE 2-6:
EWEN TIMING
TCSL
CS
CLK
DI
1
0
0
1
1
X
2.7 READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
FIGURE 2-7:
READ TIMING
CS
•••
X
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the spec-
ified time delay (TPD). Sequential read is possible when
CS is held high. The memory data will automatically cycle
to the next register and output sequentially.
CLK
DI
1
1 0 An ••• A0
DO
HIGH-Z
0
Dx ••• D0 Dx ••• D0 Dx ••• D0
DS21794B-page 8
2003 Microchip Technology Inc.
 

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