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78M6612-IM/F View Datasheet(PDF) - Teridian Semiconductor Corporation

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Description
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78M6612-IM/F
TERIDIAN
Teridian Semiconductor Corporation TERIDIAN
78M6612-IM/F Datasheet PDF : 46 Pages
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78M6612 Data Sheet
DS_6612_001
3.7 Connecting Three-Wire EEPROMs
µWire EEPROMs and other compatible devices should be connected to the DIO pins DIO4 and DIO5, as
shown in Figure 13 and described below:
DIO5 connects to both the DI and DO pins of the three-wire device.
The CS pin must be connected to a vacant DIO pin of the 78M6618.
In order to prevent bus contention, a 10 kto resistor is used to separate the DI and DO signals.
The CS and CLK pins should be pulled down with resistors to prevent operation of the three-wire
device on power-up, before the 78M6618 can establish a stable signal for CS and CLK.
The DIO_EEX register in I/O RAM must be set to 2 (b10) in order to convert the DIO pins DIO4 and
DIO5 to µWire pins.
The µ-Wire EEPROM interface is only functional when MPU_DIV[2:0] = 000.
78M6612
10k Ω
DIO4
DIO5
DIOn
V3P3D
10k Ω
EEPROM
SCLK
DI
DO
CS
Figure 13: Three-Wire EEPROM Connection
3.8 UART0 (TX0/RX0)
The UART0 RX0 pin should be pulled down by a 10 kresistor and additionally protected by a 100 pF
ceramic capacitor, as shown in Figure 14.
78M6612
RX0 100pF 10kΩ
RX 0
TX0
TX0
Figure 14: Connections for the RX0 Pin
24
Rev 2
 

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