Connection Diagram
Logic Diagram
Pin Descriptions
Pin Names
Description
OEAB, OEBA
Output Enable Inputs (Active LOW)
LEAB, LEBA
Latch Enable Inputs
CLKAB, CLKBA
Clock Inputs
CLKENAB, CLKENBA Clock Enable Inputs
A1–A18
B1–B18
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Function Table (Note 2)
Inputs
Outputs
CLKENAB OEAB LEAB CLKAB An
X
H
X
X
X
X
L
H
X
L
X
L
H
X
H
H
L
L
X
X
H
L
L
X
X
L
L
L
↑
L
L
L
L
↑
H
L
L
L
L
X
L
L
L
H
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = HIGH Impedance
Bn
Z
L
H
B0 (Note 3)
B0 (Note 3)
L
H
B0 (Note 3)
B0 (Note 4)
Note 2: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA,
LEBA, CLKBA, and CLKENBA.
Note 3: Output level before the indicated steady-state input conditions
were established
Note 4: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
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