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74VCX16240MTD View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
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74VCX16240MTD Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
January 1998
Revised June 2005
74VCX16240
Low Voltage 16-Bit Inverting Buffer/Line Driver with
3.6V Tolerant Inputs and Outputs
General Description
The VCX16240 contains sixteen inverting buffers with
3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is nibble (4-bit) controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX16240 is designed for low voltage (1.2V to
3.6V) VCC applications with I/O capability up to 3.6V.
The 74VCX16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s 1.2V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
2.5 ns max for 3.0V to 3.6V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
s Uses patented noise/EMI reduction circuitry
s Latch-up performance exceeds 300 mA
s ESD performance:
Human body model ! 2000V
Machine model ! 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Descriptions
74VCX16240MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
OEn
I0I15
O0O15
Description
Output Enable Input (Active LOW)
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation DS500099
www.fairchildsemi.com
 

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