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74VCX132BQX View Datasheet(PDF) - Fairchild Semiconductor

Part NameDescriptionManufacturer
74VCX132BQX Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs Fairchild
Fairchild Semiconductor Fairchild
74VCX132BQX Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
DC Electrical Characteristics (Continued)
Symbol
Parameter
VOL
LOW Level Output Voltage
II
IOZ
IOFF
ICC
'ICC
Input Leakage Current
3-STATE Output Leakage
Power Off Leakage Current
Quiescent Supply Current
Increase in ICC per Input
Conditions
IOL 100 PA
IOL 12 PA
IOL 18 mA
IOL 24 mA
IOL 100 PA
IOL 12 mA
IOL 18 mA
IOL 100 PA
IOL 6 mA
IOL 100 PA
IOL 2 mA
0 d VI d 3.6V
0 d VO d 3.6V
VI VIH or VIL
0 d (VI, VO) d 3.6V
VI VCC or GND
VCC d VI d 3.6V
VIH VCC - 0.6V
VCC
Min
(V)
2.7 - 3.6
2.7
3.0
3.0
2.3 - 2.7
2.3
2.3
1.65 - 2.3
1.65
1.4 - 1.6
1.4
1.4 - 3.6
1.4 - 3.6
0
1.4 - 3.6
1.4 - 3.6
2.7 - 3.6
Max
0.2
0.4
0.4
0.55
0.2
0.4
0.6
0.2
0.3
0.2
0.35
r5.0
r10.0
10.0
20.0
r20.0
750
Units
V
PA
PA
PA
PA
PA
AC Electrical Characteristics (Note 5)
Symbol
Parameter
Conditions
VCC
TA 40qC to 85qC
Units
Figure
(V)
Min
Max
Number
tPHL
Propagation Delay
tPLH
CL 30 pF, RL 500:
3.3 r 0.3
0.6
3.3
2.5 r 0.2
0.8
4.1
Figures
1, 2
1.8 r 0.15 1.0
8.2
ns
CL 15 pF, RL 2k:
1.5 r 0.1
1.0
16.4
Figures
3, 4
tOSHL
tOSLH
Output-to-Output Skew
(Note 6)
CL 30 pF, RL 500:
3.3 r 0.3
2.5 r 0.2
1.8 r 0.15
0.5
0.5
ns
0.75
CL 15 pF, RL 2k:
1.5 r 0.1
1.5
Note 5: For CL 50 pF, add approximately 300 ps to the AC maximum specification.
Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
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