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74VCX132M-1999 View Datasheet(PDF) - Fairchild Semiconductor

Part NameDescriptionManufacturer
74VCX132M(1999) Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs Fairchild
Fairchild Semiconductor Fairchild
74VCX132M Datasheet PDF : 6 Pages
1 2 3 4 5 6
July 1999
Revised July 1999
Low Voltage Quad 2-Input NAND Gate with
Schmitt Trigger Inputs and 3.6V Tolerant Inputs
and Outputs
General Description
The VCX132 contains four 2-input NAND gates with
Schmitt Trigger Inputs. The pin configuration and function
are the same as the VCX00 except the inputs have hyster-
esis between the positive-going and negative-going input
thresholds. This hysteresis is useful for transforming slowly
switching input signals into sharply defined, jitter-free out-
put signals. This product should be used where noise mar-
gin greater than that of conventional gates is required.
The VCX132 is designed for low voltage (1.65V to 3.6V)
VCC applications with I/O compatibility up to 3.6V.
This product is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
s 1.65V-3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
3.3 ns max for 3.0V to 3.6V VCC
4.1 ns max for 2.3V to 2.7V VCC
8.2 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Static Drive (IOH/IOL)
±24 mA @ 3.0V VCC
±18 mA @ 2.3V VCC
±6 mA @ 1.65V VCC
s Uses patented Quiet Seriesnoise/EMI reduction
s Latchup performance exceeds 300 mA
s ESD performance:
Human body model > 2000V
Machine model > 250V
Ordering Code:
Order Number Package Number
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Pin Name
An, Bn
Quiet Seriesis a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation ds500164
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