74V2G04(2003) View Datasheet(PDF) - STMicroelectronics
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Description
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74V2G04 Datasheet PDF : 7 Pages
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74V2G04
TRIPLE INVERTER
s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA = 25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUT
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN) at VCC = 4.5V
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2G04 is an advanced high-speed CMOS
TRIPLE INVERTER fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology.
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2G04STR
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on input and 0
to 7V can be accepted on input with no regard to
the supply voltage. This device can be used to
interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
1/7
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