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74V1G70S View Datasheet(PDF) - STMicroelectronics

Part Name
Description
View to exact match
74V1G70S
ST-Microelectronics
STMicroelectronics ST-Microelectronics
74V1G70S Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
®
74V1G70
SINGLE BUFFER
s HIGH SPEED: tPD = 4.3 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1 µA (MAX.) at TA = 25 oC
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1G70 is an advanced high-speed CMOS
SINGLE BUFFER fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology.
S
(SOT23-5L)
C
(SC-70)
ORDER CODE:
74V1G70S
74V1G70C
The internal circuit is composed of 2 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 1999
1/7
 

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