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74LVX08M(2005) View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
74LVX08M
(Rev.:2005)
Fairchild
Fairchild Semiconductor Fairchild
74LVX08M Datasheet PDF : 6 Pages
1 2 3 4 5 6
May 1993
Revised February 2005
74LVX08
Low Voltage Quad 2-Input AND Gate
General Description
The LVX08 contains four 2-input AND gates. The inputs tol-
erate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
Features
s Input voltage level translation from 5V to 3V
s Ideal for low power/low noise 3.3V applications
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number
Package
Number
Package Description
74LVX08M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVX08SJ
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX08MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVX08MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 1)
Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation DS011602
www.fairchildsemi.com
 

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