datasheetbank_Logo    전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크
부품명 :

74LVQ08M 데이터 시트보기 (PDF) - STMicroelectronics

부품명74LVQ08M ST-Microelectronics
STMicroelectronics ST-Microelectronics
상세내역QUAD 2-INPUT AND GATE
74LVQ08M Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
74LVQ08
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
S Y M B OL
1A to 4A
1B to 4B
1Y to 4Y
GND
VCC
NAME AND FUNCTION
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
B
Y
L
L
L
L
H
L
H
L
L
H
H
H
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC Supply Voltage
-0.5 to +7
V
VI
DC Input Voltage
-0.5 to VCC + 0.5
V
VO DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 50
mA
ICC or IGND DC VCC or Ground Current
± 200
mA
Tstg Storage Temperature
-65 to +150
oC
TL
Lead Temperature (10 sec)
300
oC
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC Supply Voltage (note 1)
VI
Input Voltage
VO
Output Voltage
Top Operating Temperature:
dt/dv Input Rise and Fall Time (VCC = 3V) (note 2)
1) Truth Table guaranteed: 1.2V to 3.6V
2) VIN from 0.8V to 2V
Valu e
2 to 3.6
0 to VCC
0 to VCC
-40 to +85
0 to 10
Unit
V
V
V
oC
ns/V
2/8
Direct download click here

DESCRIPTION
The LVQ08 is a low voltage CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.It is ideal for low power and low noise 3.3V applications.
The internal circuit is composed of 2 stages including buffer output, which enables high noise immunity and stable output.
It has better speed performance at 3.3V than 5V LS-TTL family combined with the true CMOS low power consumption.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

■ HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V
■ COMPATIBLEWITH TTL OUTPUTS
■ LOW POWER DISSIPATION:
   ICC =2 µA (MAX.) at TA = 25 °C
■ LOW NOISE:
   VOLP = 0.3 V (TYP.) at VCC = 3.3V
■ 75Ω TRANSMISSIONLINE DRIVING CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
   |IOH| = IOL = 24 mA (MIN)
■ PCI BUS LEVELSGUARANTEED AT 24mA
■ BALANCEDPROPAGATIONDELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGERANGE:
   VCC (OPR)= 2V to 3.6V (1.2VData Retention)
■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 08
■ IMPROVED LATCH-UP IMMUNITY

Share Link : ST-Microelectronics
@ 2014 - 2018  [ ][ 개인정보 보호정책 ] [ 요청 데이타시트 ][ 제휴문의 ]