74LV132N View Datasheet(PDF) - NXP Semiconductors.
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Description
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74LV132N Datasheet PDF : 17 Pages
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NXP Semiconductors
74LV132
Quad 2-input NAND Schmitt trigger
Table 8. Measurement points
Supply voltage
VCC
< 2.7 V
2.7 V to 3.6 V
≥ 4.5 V
Input
VM
0.5VCC
1.5 V
0.5VCC
Output
VM
0.5VCC
1.5 V
0.5VCC
VCC
VI
PULSE
GENERATOR
VO
DUT
RT
CL
50 pF
RL
1 kΩ
001aaa663
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
Fig 7. Load circuit for switching times
Table 9. Test data
Supply voltage
VCC
< 2.7 V
2.7 V to 3.6 V
≥ 4.5 V
Input
VI
VCC
2.7 V
VCC
13. Transfer characteristics
tr, tf
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
Table 10. Transfer characteristics
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter
Conditions
VT+
positive-going
see Figure 6
threshold voltage VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V
VCC = 3.6 V
VCC = 4.5 V
VCC = 5.5 V
−40 °C to +85 °C
Min Typ[1] Max
−40 °C to +125 °C Unit
Min
Max
-
0.70 -
-
0.8 1.10 1.4
0.8
1.0 1.45 2.0
1.0
1.2 1.60 2.2
1.2
1.5 1.95 2.4
1.5
1.7 2.50 3.2
1.7
2.1 3.00 3.9
2.1
-
V
1.4
V
2.0
V
2.2
V
2.4
V
3.2
V
3.9
V
74LV132_5
Product data sheet
Rev. 05 — 2 July 2009
© NXP B.V. 2009. All rights reserved.
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