74LV132N View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
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74LV132N Datasheet PDF : 17 Pages
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NXP Semiconductors
74LV132
Quad 2-input NAND Schmitt trigger
4. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74LV132N
−40 °C to +125 °C DIP14
plastic dual in-line package; 14 leads (300 mil)
74LV132D
−40 °C to +125 °C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
74LV132DB
−40 °C to +125 °C SSOP14
plastic shrink small outline package; 14 leads;
body width 5.3 mm
74LV132PW
−40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
74LV132BQ
−40 °C to +125 °C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
Version
SOT27-1
SOT108-1
SOT337-1
SOT402-1
SOT762-1
5. Functional diagram
1 1A
2 1B
1Y 3
4 2A
5 2B
2Y 6
9 3A
10 3B
3Y 8
12 4A
13 4B
Fig 1. Logic symbol
4Y 11
mna407
1
&
3
2
4
&
6
5
9
&
8
10
12
&
11
13
mna408
Fig 2. IEC logic symbol
A
Y
B
mna409
Fig 3. Logic diagram (one gate)
74LV132_5
Product data sheet
Rev. 05 — 2 July 2009
© NXP B.V. 2009. All rights reserved.
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