74LV86D View Datasheet(PDF) - NXP Semiconductors.
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74LV86D Datasheet PDF : 15 Pages
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NXP Semiconductors
74LV86
Quad 2-input exclusive-OR gate
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter
Conditions
−40 °C to +85 °C
Min Typ[1] Max
tpd
propagation delay nA, nB to nY; see Figure 6
[2]
VCC = 1.2 V
-
70
-
VCC = 2.0 V
-
24
32
VCC = 2.7 V
-
VCC = 3.0 V to 3.6 V; CL = 15 pF [3] -
VCC = 3.0 V to 3.6 V
[3]
-
18
24
11
-
13
19
VCC = 4.5 V to 5.5 V
CPD
power dissipation CL = 50 pF; fi = 1 MHz;
capacitance
VI = GND to VCC
-
[4]
-
-
16
30
-
[1] All typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V).
[4] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
N = number of inputs switching
Σ(CL × VCC2 × fo) = sum of the outputs.
−40 °C to +125 °C Unit
Min
Max
-
-
ns
-
41
ns
-
30
ns
-
-
ns
-
24
ns
-
20
ns
-
-
pF
74LV86_3
Product data sheet
Rev. 03 — 27 November 2007
© NXP B.V. 2007. All rights reserved.
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