74LV32PW View Datasheet(PDF) - NXP Semiconductors.
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Description
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74LV32PW Datasheet PDF : 15 Pages
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NXP Semiconductors
74LV32
Quad 2-input OR gate
5.2 Pin description
Table 2.
Symbol
1A
1B
1Y
2A
2B
2Y
GND
3Y
3A
3B
4Y
4A
4B
VCC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data input
data input
data output
data input
data input
data output
ground (0 V)
data output
data input
data input
data output
data input
data input
supply voltage
6. Functional description
Table 3. Function selection
H = HIGH voltage level; L = LOW voltage level; X = don’t care
Input
nA
nB
H
X
X
H
L
L
7. Limiting values
Output
nY
H
H
L
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
VI < −0.5 V or VI > VCC + 0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
VO = −0.5 V to (VCC + 0.5 V)
−0.5
[1] -
[1] -
-
-
−50
−65
+7.0 V
±20
mA
±50
mA
±25
mA
50
mA
-
mA
+150 °C
74LV32_3
Product data sheet
Rev. 03 — 9 November 2007
© NXP B.V. 2007. All rights reserved.
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