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74LV32N View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
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74LV32N
NXP
NXP Semiconductors. NXP
74LV32N Datasheet PDF : 15 Pages
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NXP Semiconductors
4. Functional diagram
74LV32
Quad 2-input OR gate
1
1
3
2
1 1A
2 1B
4 2A
5 2B
9 3A
10 3B
12 4A
13 4B
1Y 3
2Y 6
3Y 8
4Y 11
mna242
Fig 1. Logic symbol
4
1
6
5
9
1
8
10
12
1
11
13
mna243
Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
A
Y
B
mna241
Fig 3. Logic diagram (one gate)
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
74LV32
14 VCC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
001aah104
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
terminal 1
index area
1B 2
1Y 3
2A 4
2B 5
2Y 6
74LV32
VCC(1)
13 4B
12 4A
11 4Y
10 3B
9 3A
001aah105
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 5. Pin configuration DHVQFN14
74LV32_3
Product data sheet
Rev. 03 — 9 November 2007
© NXP B.V. 2007. All rights reserved.
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