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74LV4051PWDH View Datasheet(PDF) - Philips Electronics

Part Name
Description
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74LV4051PWDH
Philips
Philips Electronics Philips
74LV4051PWDH Datasheet PDF : 18 Pages
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Philips Semiconductors
8-channel analog multiplexer/demultiplexer
Product specification
74LV4051
FEATURES
Optimized for low voltage applications: 1.0 to 6.0 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Low typ “ON” resistance:
60 W at Vcc – VEE = 4.5 V
90 W at Vcc – VEE = 3.0 V
145 W at Vcc – VEE = 2.0 V
Logic level translation: to enable 3 V logic to communicate with ± 3
V analog signals
Typical “break before make” built in
Output capability: non-standard
ICC category: MSI
DESCRIPTION
The 74LV4051 is a low-voltage CMOS device and is pin and
function compatible with the 74HC/HCT4051.
The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with
three digital select inputs (S0 to S2) an active LOW enable input (E),
eight independent inputs/outputs (Y0 to Y7) and a common
input/output (Z).
With E LOW, one of the eight switches is selected (low impedance
ON-state) by S0 to S2. With E HIGH, all switches are in the high
impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control
inputs (S0 to S2, and E). The VCC to GND ranges are 1.0 to 6.0 V.
The analog inputs/outputs (Y0 to Y7 and Z) can swing between VCC
as a positive limit and VEE as a negative limit. VCC - VEE may not
exceed 6.0 V. For operation as a digital multiplexer/demultiplexer,
VEE is connected to GND (typically ground).
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr =tf 2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPZH/tPZL
Turn “ON” time
E to VOS
Sn to VOS
CL = 15 pF
RL = 1KW
VCC = 3.3 V
tPHZ/tPLZ
Turn “OFF” time
E to VOS
Sn to VOS
CI
Input capacitance
CPD
Power dissipation capacitance per switch See Notes 1 and 2
CS
Maximum switch capacitance
independent (Y) common (Z)
NOTES:
1.
CPD is used
PD = CPD ×
VtoCCd2et×erfmi )inȍe
the dynamic
((CL + CS) ×
power dissipation
VCC2 × fo) where:
(PD
in
µW)
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; CS = maximum switch capacitance in pF;
VȍC(C(C=L
supply voltage
+CS) × VCC2 ×
in V;
fo) =
sum
of
the
outputs.
2. The condition is VI = GND to VCC.
TYPICAL
23
22
25
20
3.5
25
5
25
UNIT
ns
pF
ORDERING INFORMATION
PACKAGES
16-Pin Plastic DIL
16-Pin Plastic SO
16-Pin Plastic SSOP Type II
16-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
OUTSIDE NORTH AMERICA
74LV4051 N
74LV4051 D
74LV4051 DB
74LV4051 PW
NORTH AMERICA
74LV4051 N
74LV4051 D
74LV4051 DB
74LV4051PW DH
Code
SOT38-4
SOT109-1
SOT338-1
SOT403-1
PIN CONFIGURATION
Y4 1
Y6 2
Z3
Y7 4
Y5 5
E6
VEE 7
GND 8
16 VCC
15 Y2
14 Y1
13 Y0
12 Y3
11 S0
10 S1
9 S2
SV01702
PIN DESCRIPTION
PIN NUMBER SYMBOL
3
Z
6
E
7
VEE
8
GND
11, 10, 9
13, 14, 15, 12,
1, 5, 2, 4
S0 to S2
Y0 to Y7
16
VCC
FUNCTION
Common input/output
Enable input (active LOW)
Negative supply voltage
Ground (0 V)
Select inputs
Independent inputs/outputs
Positive supply voltage
1998 Jun 23
2
853-1998 19618
 

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