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74LCX821MTC View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
74LCX821MTC Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Pin Descriptions
Function Table
Pin Names
D0D9
CLK
OE
O0O9
Description
Data Inputs
Clock Input
Output Enable Input
3-STATE Latch Outputs
Functional Description
The LCX821 consists of ten edge-triggered flip-flops with
individual D-type inputs with 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The ten flip-flops will store the state of their
individual D inputs that meet the setup and hold time
Logic Diagram
Inputs
Internal
OE CLK D
Q
H H L NC
H H H NC
 H
L
L
 H
H
H
 L
L
L
 L
H
H
L H L NC
L H H NC
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impendance
= LOW-to-HIGH Transition
NC = No Change
Outputs
On
Function
Z Hold
Z Hold
Z Load
Z Load
L Data Available
H Data Available
NC No Change in Data
NC No Change in Data
requirements on the LOW-to-HIGH Clock (CLK) transition.
With the Output Enable (OE) LOW, the contents of the ten
flip-flops are available at the outputs. When OE is HIGH,
the outputs go to the high impedance state. Operation of
the OE input does not affect the state of the flip-flops.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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