Philips Semiconductors
7-stage binary ripple counter
PIN DESCRIPTION
PIN NO.
SYMBOL
1
CP
2
MR
12, 11, 9, 6, 5, 4, 3 Q0 to Q6
7
GND
8, 10, 13
n.c.
14
VCC
NAME AND FUNCTION
clock input (HIGH-to-LOW, edge-triggered)
master reset input (active HIGH)
parallel outputs
ground (0 V)
not connected
positive supply voltage
Product speciļ¬cation
74HC/HCT4024
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3