74HCT32DR View Datasheet(PDF) - ON Semiconductor

Part Name

Description

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74HCT32DR

Quad 2−Input OR Gate with LSTTL Compatible Inputs

ON Semiconductor 

74HCT32

DC CHARACTERISTICS (Voltages Referenced to GND)

Symbol

Parameter

Condition

VCC

Guaranteed Limit

(V) −55 to 25°C ≤85°C ≤125°C Unit

VIH

Minimum High−Level Input Voltage Vout = 0.1V

4.5

|Iout| ≤ 20mA

5.5

VIL

Maximum Low−Level Input Voltage Vout = VCC − 0.1V

4.5

|Iout| ≤ 20mA

5.5

VOH

Minimum High−Level Output

Vin = VIL

4.5

Voltage

|Iout| ≤ 20mA

5.5

Vin = VIL

|Iout| ≤ 4.0mA 4.5

VOL

Maximum Low−Level Output

Vin = VIH

4.5

Voltage

|Iout| ≤ 20mA

5.5

Vin = VIH

|Iout| ≤ 4.0mA 4.5

Iin

Maximum Input Leakage Current

Vin = VCC or GND

5.5

ICC

Maximum Quiescent Supply

Vin = VCC or GND

5.5

Current (per Package)

Iout = 0mA

2.0

2.0

0.8

0.8

4.4

5.4

3.98

0.1

0.1

0.26

±0.1

2.0

2.0

2.0

V

2.0

2.0

0.8

0.8

V

0.8

0.8

4.4

4.4

V

5.4

5.4

3.84 3.70

0.1

0.1

V

0.1

0.1

0.33 0.40

±1.0

±1.0

mA

20

40

mA

DICC

Additional Quiescent Supply

Current

Vin = 2.4V, Any One Input

≥ −55°C

Vin = VCC or GND, Other Inputs

Iout = 0mA

5.5

2.9

25 to 125°C

2.4

mA

1. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).

2. Total Supply Current = ICC + ΣDICC.

AC CHARACTERISTICS (CL = 50pF, Input tr = tf = 6ns)

Symbol

Parameter

Guaranteed Limit

VCC

(V) −55 to 25°C ≤85°C

≤125°C Unit

tPLH,

tPHL

Maximum Propagation Delay, Input A or B to Output Y

(Figures 1 and 2)

4.5

15

19

22

ns

tTLH,

tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 2)

4.5

15

19

22

ns

Cin

Maximum Input Capacitance

10

10

10

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON

Semiconductor High−Speed CMOS Data Book (DL129/D).

Typical @ 25°C, VCC = 5.0 V, VEE = 0 V

CPD

Power Dissipation Capacitance (Per Buffer)*

20

pF

* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the

ON Semiconductor High−Speed CMOS Data Book (DL129/D).

http://onsemi.com

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