74HC20N View Datasheet(PDF) - Philips Electronics

Part Name

Description

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74HC20N

Dual 4-input NAND gate

Philips Electronics 

Philips Semiconductors

Dual 4-input NAND gate

Product specification

74HC/HCT20

FEATURES

• Output capability: standard

• ICC category: SSI

GENERAL DESCRIPTION

The 74HC/HCT20 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT20 provide the 4-input NAND function.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

SYMBOL

PARAMETER

CONDITIONS

tPHL/ tPLH

CI

CPD

propagation delay nA, nB, nC, nD to nY

input capacitance

power dissipation capacitance per package

CL = 15 pF; VCC = 5 V

notes 1 and 2

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in V

∑ (CL × VCC2 × fo) = sum of outputs

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

TYPICAL

HC

8

3.5

22

HCT

13

3.5

17

UNIT

ns

pF

pF

December 1990

2

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