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74HC05PW View Datasheet(PDF) - NXP Semiconductors.

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Description
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74HC05PW
NXP
NXP Semiconductors. NXP
74HC05PW Datasheet PDF : 13 Pages
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NXP Semiconductors
74HC05
Hex inverter with open-drain outputs
1A 1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
GND 7
74HC05
14 VCC
13 6A
12 6Y
11 5A
10 5Y
9 4A
8 4Y
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Fig 4. Pin configuration SOT402-1 (TSSOP14)
terminal 1
index area
1Y 2
2A 3
2Y 4
3A 5
3Y 6
74HC05
GND(1)
13 6A
12 6Y
11 5A
10 5Y
9 4A
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Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Fig 5. Pin configuration SOT762-1 (DHVQFN14)
5.2 Pin description
Table 2.
Symbol
1A to 6A
1Y to 6Y
GND
VCC
Pin description
Pin
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
7
14
6. Functional description
Description
data input
data output
ground (0 V)
supply voltage
Table 3.
Input
nA
L
H
Function table[1]
Output
nY
Z
L
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
IIK
input clamping current
IOK
output clamping current
VO
output voltage
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
0.5
[1] -
[1] -
[1] 0.5
+7
V
20
mA
20
mA
VCC + 0.5 V V
74HC05_2
Product data sheet
Rev. 02 — 18 June 2009
© NXP B.V. 2009. All rights reserved.
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