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74HCT107 View Datasheet(PDF) - Philips Electronics

Part Name
Description
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74HCT107 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Philips Semiconductors
Dual JK flip-flop with reset; negative-edge trigger
Product specification
74HC/HCT107
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: flip-flops
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
40 to +85 40 to +125
min. typ. max. min. max. min. max.
UNIT
VCC WAVEFORMS
(V)
tPHL/ tPLH
propagation delay
nCP to nQ
tPHL/ tPLH
propagation delay
nCP to nQ
52 160
200
240
2.0
19 32
40
48 ns
4.5 Fig.6
15 27
34
41
6.0
52 160
200
240
2.0
19 32
40
48 ns
4.5 Fig.6
15 27
34
41
6.0
tPHL/ tPLH
propagation delay
nR to nQ, nQ
52 155
195
235
2.0
19 31
39
47 ns
4.5 Fig.7
15 26
33
40
6.0
tTHL/ tTLH output transition time
tW
clock pulse width
HIGH or LOW
19 75
95
7 15
19
6 13
16
80 22
100
16 8
20
14 6
17
110
22 ns
19
120
24
ns
20
2.0
4.5 Fig.6
6.0
2.0
4.5 Fig.6
6.0
tW
reset pulse width
LOW
80 22
16 8
14 6
100
120
2.0
20
24
ns
4.5 Fig.7
17
20
6.0
trem
removal time
nR to nCP
60 19
12 7
10 6
tsu
set-up time
nJ, nK to nCP
100 22
20 8
17 6
th
hold time
nJ, nK to nCP
3 6
3 2
3 2
fmax
maximum clock pulse
frequency
6.0 23
30 70
35 85
75
90
2.0
15
18
ns
4.5 Fig.7
13
15
6.0
125
150
2.0
25
30
ns
4.5 Fig.6
21
26
6.0
3
3
2.0
3
3
ns
4.5 Fig.6
3
3
6.0
4.8
4.0
2.0
24
20
MHz 4.5 Fig.6
28
24
6.0
December 1990
5
 

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