74F1071 View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

View to exact match

74F1071

18-Bit Undershoot/Overshoot Clamp and ESD Protection Device

Fairchild Semiconductor 

October 1994

Revised March 2005

74F1071

18-Bit Undershoot/Overshoot Clamp

and ESD Protection Device

General Description

The 74F1071 is an 18-bit undershoot/overshoot clamp

which is designed to limit bus voltages and also to protect

more sensitive devices from electrical overstress due to

electrostatic discharge (ESD). The inputs of the device

aggressively clamp voltage excursions nominally at 0.5V

below and 7V above ground.

Features

s 18-bit array structure in 20-pin package

s FAST£ Bipolar voltage clamping action

s Dual center pin grounds for min inductance

s Robust design for ESD protection

s Low input capacitance

s Optimum voltage clamping for 5V CMOS/TTL

applications

Ordering Code:

Order Number

Package

Number

Package Description

74F1071SC

M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74F1071SCX_NL

(Note 1)

M20B Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74F1071MSA

MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74F1071MSAX_NL

(Note 1)

MSA20 Pb-Free 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74F1071MTC

MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74F1071MTCX_NL

(Note 1)

MTC20 Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Connection Diagram

Note: Simplified Component Representation

£ FAST is a registered trademark of Fairchild Semiconductor Corporation.

© 2005 Fairchild Semiconductor Corporation DS011685

www.fairchildsemi.com

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