74ALVCH16374 View Datasheet(PDF) - STMicroelectronics

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74ALVCH16374

LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

STMicroelectronics 

74ALVCH16374

LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)

WITH 3.6V TOLERANT INPUTS AND OUTPUTS

s 3.6V TOLERANT INPUTS AND OUTPUTS

s HIGH SPEED :

tPD = 4.2 ns (MAX.) at VCC = 3.0 to 3.6V

tPD = 5.3 ns (MAX.) at VCC = 2.3 to 2.7V

tPD = 6.5 ns (MAX.) at VCC = 1.65V

s POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 24mA (MIN) at VCC = 3.0V

|IOH| = IOL = 18mA (MIN) at VCC = 2.3V

|IOH| = IOL = 4mA (MIN) at VCC = 1.65V

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 1.65V to 3.6V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 16374

s BUS HOLD PROVIDED ON DATA INPUTS

s LATCH-UP PERFORMANCE EXCEEDS

300mA (JESD 17)

s ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);

MM > 200V

DESCRIPTION

The 74ALVCH16374 is a low voltage CMOS 16

BIT D-TYPE FLIP-FLOP with 3 STATE OUTPUTS

NON INVERTING fabricated with sub-micron

silicon gate and five-layer metal wiring C2MOS

technology. It is ideal for low power and very high

speed 1.65 to 3.6V applications; it can be

interfaced to 3.6V signal environment for both

inputs and outputs.

These 16 bit D-TYPE flip-flops are controlled by

two clock inputs (nCK) and two output enable

inputs (nOE).

On the positive transition of the (nCK), the nQ

outputs will be set to the logic state that were

setup at the nD inputs.

While the (nOE) input is low, the outputs (nQ) will

be in a normal state (HIGH or LOW logic level)

and while high level the outputs will be in a high

impedance state. Any output control does not

affect the internal operation of flip flops; that is, the

old data can be retained or the new data can be

entered even while the outputs are off.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

February 2003

TSSOP

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74ALVCH16374TTR

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