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74ALVCH16821DL View Datasheet(PDF) - Philips Electronics

Part Name
Description
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74ALVCH16821DL Datasheet PDF : 12 Pages
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Philips Semiconductors
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
Product specification
74ALVCH16821
FEATURES
Wide supply voltage range of 1.2V to 3.6V
Complies with JEDEC standard no. 8-1A
Current drive ± 24 mA at 3.0 V
CMOS low power consumption
Direct interface with TTL levels
MULTIBYTETM flow-through standard pin-out architecture
Low inductance multiple VCC and ground pins for minimum noise
and ground bounce
All data inputs have bus hold
Output drive capability 50transmission lines @ 85°C
DESCRIPTION
The 74ALVCH16821 has two 10-bit, edge triggered registers, with
each register coupled to a 3-State output buffer. The two sections of
each register are controlled independently by the clock (nCP) and
Output Enable (nOE) control gates.
Each register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
When nOE is LOW, the data in the register appears at the outputs.
When nOE is HIGH, the outputs are in high impedance OFF state.
Operation of the nOE input does not affect the state of the flip-flops.
The 74ALVCH16821 has active bus hold circuitry which is provided
to hold unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or pull-down
resistors.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf 2.5ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
CI
CPD
Propagation delay
nCP to nQn
Input capacitance
Power dissipation capacitance per buffer
VCC = 2.5V, CL = 30pF
VCC = 3.3V, CL = 50pF
VI = GND to VCC1
Outputs enabled
Outputs disabled
Fmax
Maximum clock frequency
VCC = 2.5V, CL = 30pF
VCC = 3.3V, CL = 50pF
NOTE:
1. CPD is used to determine the dynamic power dissipation (PD in mW):
PD = CPD × VCC2 × fi + S (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL × VCC2 × fo) = sum of outputs.
TYPICAL
2.6
2.5
5.0
33
17
250
350
UNIT
ns
pF
pF
MHz
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74ALVCH16821 DL
–40°C to +85°C
74ALVCH16821 DGG
NORTH AMERICA
ACH16821 DL
ACH16821 DGG
DWG NUMBER
SOT371-1
SOT364-1
1998 May 29
2
853-2066 19467
 

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