datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

74AHC1G79 View Datasheet(PDF) - Philips Electronics

Part Name
Description
View to exact match
74AHC1G79 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
Single D-type flip-flop; positive-edge trigger
Product specification
74AHC1G79;
74AHCT1G79
FEATURES
Symmetrical output impedance
High noise immunity
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V;
MM EIA/JESD22-A115-A
exceeds 200 V
Low power dissipation
Balanced propagation delays
Very small 5 pin package
Output capability: standard.
DESCRIPTION
The 74AHC1G/AHCT1G79 is a
high-speed Si-gate CMOS device.
The 74AHC1G/AHCT1G79 provides
a single positive-edge triggered
D-type flip-flop.
Information on the data input is
transferred to the Q output on the
LOW-to-HIGH transition of the clock
pulse. The D input must be stable one
set-up time prior to the LOW-to-HIGH
clock transition for predictable
operation.
FUNCTION TABLE
See note 1.
INPUTS
OUTPUT
CP
D
L
H
L
X
Q+1
L
H
Q
Note
1. H = HIGH voltage level;
L = LOW voltage level;
= LOW-to-HIGH CP transition;
X = don’t care;
Q + 1 = state after the next
LOW-to-HIGH CP transition.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.
SYMBOL
PARAMETER
TYPICAL
CONDITIONS
UNIT
AHC1G AHCT1G
tPHL/tPLH propagation delay CL = 15 pF; 3.5
3.5
ns
CP to Q
VCC = 5 V
CI
input capacitance
1.5
1.5
pF
CPD
power dissipation notes 1 and 2; 15
16
pF
capacitance
CL = 50 pF;
f = 1 Mhz
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V.
2. The condition is VI = GND to VCC.
PINNING
PIN
1
2
3
4
5
SYMBOL
D
CP
GND
Q
VCC
DESCRIPTION
data input
clock pulse input
ground (0 V)
data output
DC supply voltage
1999 May 18
2
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]