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74ACTQ16541SSCX-1999 View Datasheet(PDF) - Fairchild Semiconductor

Part NameDescriptionManufacturer
74ACTQ16541SSCX(1999) 16-Bit Buffer/Line Driver with 3-STATE Outputs Fairchild
Fairchild Semiconductor Fairchild
74ACTQ16541SSCX Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
AC Electrical Characteristics
Symbol
Parameter
tPLH
Propagation Delay
tPHL
Data to Output
tPZH
Output Enable Time
tPZL
tPHZ
Output Disable Time
tPLZ
Note 8: Voltage Range 5.0 is 5.0V ± 0.5V.
VCC
(V)
(Note 8)
5.0
5.0
5.0
TA = +25°C
CL = 50 pF
Min
Typ
Max
3.0
5.2
7.3
2.5
4.8
7.3
2.6
5.0
7.4
2.7
5.4
8.0
2.7
5.6
8.3
2.4
5.2
7.9
TA = 40°C to +85°C
CL = 50 pF
Min
Max
3.0
7.8
2.5
7.8
2.6
7.9
2.7
8.5
2.7
8.7
2.4
8.4
Units
ns
ns
ns
Extended AC Electrical Characteristics
TA = 40°C to +85°C
CL = 50 pF
TA = 40°C to +85°C
Symbol
Parameter
VCC
16 Outputs Switching
CL = 250 pF
Units
(V)
(Note 11)
(Note 12)
(Note 9)
Min
Typ
Max
Min
Max
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tOSHL
(Note 10)
Propagation Delay,
Data to Output
Output Enable Time
Output Disable Time
Pin to Pin Skew, HL
Data to Output
4.0
5.0
3.4
3.3
5.0
3.3
4.3
5.0
3.8
5.0
11.6
5.6
14.3
ns
9.6
4.8
13.1
10.1
(Note 13)
ns
10.0
10.1
(Note 14)
ns
9.6
1.2
ns
tOSLH
Pin to Pin Skew, LH
5.0
2.5
ns
(Note 10) Data to Output
tOST
Pin to Pin Skew,
5.0
4.3
ns
(Note 10) LH/HL Data to Output
Note 9: Voltage Range 5.0 is 5.0V ± 0.5V.
Note 10: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (tOSHL), LOW-to-HIGH (tOSLH), or any combination switching LOW-to-HIGH and/or HIGH-
to-LOW (tOST).
Note 11: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 12: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 13: 3-STATE delays are load dominated and have been excluded from the datasheet.
Note 14: The Output Disable Time is dominated by the RC Network (500, 250 pF) on the output and has been excluded from the datasheet.
Capacitance
Symbol
CIN
CPD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
Units
Conditions
4.5
pF
VCC = 5.0V
30
pF
VCC = 5.0V
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