74ABT244CPCX View Datasheet(PDF) - Fairchild Semiconductor
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74ABT244CPCX Datasheet PDF : 11 Pages
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DC Electrical Characteristics
(SOIC package)
Conditions
Symbol
Parameter
Min
Typ
Max Units VCC
CL 50 pF,
RL 500:
VOLP
Quiet Output Maximum Dynamic VOL
0.5
0.8
V
5.0 TA 25qC (Note 6)
VOLV
Quiet Output Minimum Dynamic VOL
1.3
0.8
V
5.0 TA 25qC (Note 6)
VOHV Minimum HIGH Level Dynamic Output Voltage
2.7
3.1
V
5.0 TA 25qC (Note 8)
VIHD
Minimum HIGH Level Dynamic Input Voltage
2.0
1.5
V
5.0 TA 25qC (Note 7)
VILD
Maximum LOW Level Dynamic Input Voltage
1.1
0.8
V
5.0 TA 25qC (Note 7)
Note 6: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 7: Max number of data inputs (n) switching. n 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD).
Guaranteed, but not tested.
Note 8: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
AC Electrical Characteristics
(SOIC and SSOP package)
Symbol
Parameter
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
Data to Outputs
Output Enable
Time
Output Disable
Time
TA 25qC
VCC 5V
CL 50 pF
Min
Typ
Max
1.0
2.5
3.6
1.0
2.3
3.6
1.5
3.5
6.0
1.5
3.6
6.0
1.7
3.5
5.6
1.7
3.3
5.6
TA 55qC to 125qC
VCC 4.5V–5.5V
CL 50 pF
Min
Max
1.0
5.3
1.0
5.0
0.8
6.5
1.2
7.9
1.2
7.6
1.0
7.9
TA 40qC to 85qC
VCC 4.5V–5.5V
CL 50 pF
Min
Max
1.0
3.6
1.0
3.6
1.5
6.0
1.5
6.0
1.7
5.6
1.7
5.6
Units
ns
ns
ns
Extended AC Electrical Characteristics
(SOIC package)
TA40qC to 85qC
TA 40qC to 85qC TA 40qC to 85qC
VCC 4.5V–5.5V
VCC 4.5V–5.5V
VCC 4.5V–5.5V
Symbol
Parameter
CL 50 pF
CL 250 pF
CL 250 pF
Units
8 Outputs Switching
1 Output Switching 8 Outputs Switching
(Note 9)
(Note 10)
(Note 11)
Min
Typ
Max
Min
Max
Min
Max
fTOGGLE Max Toggle Frequency
100
tPLH
Propagation Delay
1.5
5.0
1.5
6.0
2.5
8.5
tPHL
Data to Outputs
1.5
5.0
1.5
6.0
2.5
8.5
tPZH
Output Enable Time
1.5
6.5
2.5
7.5
2.5
10.0
tPZL
1.5
6.5
2.5
7.5
2.5
12.0
tPHZ
Output Disable Time
1.0
tPLZ
1.0
5.6
(Note 12)
5.6
(Note 12)
Note 9: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
MHz
ns
ns
ns
Note 10: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 11: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 12: The 3-STATE delays are dominated by the RC network (500:, 250 pF) on the output and have been excluded from the datasheet.
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