56F802X View Datasheet(PDF) - Freescale Semiconductor

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56F802X

16-bit Digital Signal Controllers

Freescale Semiconductor 

1. Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced

from the vector table, providing only 19 bits of address.

2. If the VBA is set to $0000, the first two locations of the vector table will overlay the chip reset addresses since the reset

address would match the base of this vector table.

4.3 Program Map

The Program Memory map is shown in Table 4-3.

Table 4-3 Program Memory Map1 at Reset

Begin/End Address

Memory Allocation

P: $1F FFFF

P: $00 8800

RESERVED

P: $00 87FF

P: $00 8000

On-Chip RAM2

4KB

P: $00 7FFF

P: $00 4000

Internal Program Flash

32KB

Cop Reset Address = $00 4002

Boot Location = $00 4000

P: $00 3FFF

P: $00 0000

RESERVED

1. All addresses are 16-bit Word addresses.

2. This RAM is shared with Data space starting at address X: $00 0000; see Figure 4-1.

4.4 Data Map

Table 4-4 Data Memory Map1

Begin/End Address

Memory Allocation

X:$FF FFFF

X:$FF FF00

X:$FF FEFF

X:$01 0000

X:$00 FFFF

X:$00 F000

X:$00 EFFF

X:$00 8800

X:$00 87FF

X:$00 8000

X:$00 7FFF

X:$00 0800

X:$00 07FF

X:$00 0000

EOnCE

256 locations allocated

RESERVED

On-Chip Peripherals

4096 locations allocated

RESERVED

RESERVED

RESERVED

On-Chip Data RAM2

4KB

56F8025 Data Sheet, Rev. 3

38

Freescale Semiconductor

Preliminary

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