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54LS160ALMQB View Datasheet(PDF) - National ->Texas Instruments

Part NameDescriptionManufacturer
54LS160ALMQB Synchronous Presettable BCD Decade Counters National-Semiconductor
National ->Texas Instruments National-Semiconductor
54LS160ALMQB Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Functional Description (Continued)
The Terminal Count (TC) output is HIGH when CET is HIGH
and the counter is in its maximum count state (9 for the
decade counters 15 for the binary counters) To implement
synchronous multistage counters the TC outputs can be
used with the CEP and CET inputs in two different ways
These two schemes are shown in the 9310 data sheet The
TC output is subject to decoding spikes due to internal race
conditions and is therefore not recommended for use as a
clock or asynchronous reset for flip-flops counters or regis-
ters In the decade counters of the ’LS160 ’LS162 the TC
output is fully decoded and can only be HIGH in state 9
LOGIC EQUATIONS
Count Enable e CEP  CET  PE
TC e Q0  Q1  Q2  Q3  CET
Mode Select Table
Action on the Rising
SR PE CET CEP
Clock Edge (L )
L
X
X
H
L
X
H
H
H
H
H
L
H
H
X
X
RESET (Clear)
X
x LOAD (Pn Qn)
H
COUNT (Increment)
X
NO CHANGE (Hold)
L
NO CHANGE (Hold)
For the ’LS162
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
State Diagrams
’LS160 ’LS162
TL F 10177 – 5
4
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