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54AC16373WD View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
54AC16373WD 16-BIT TRANSPARENT D-TYPE LATCHES TI
Texas Instruments TI
54AC16373WD Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
54AC16373, 74AC16373
16-BIT TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCAS121B – MARCH 1990 – REVISED APRIL 1996
D Members of the Texas Instruments
Widebus Family
D 3-State True Outputs
D Full Parallel Access for Loading
D Flow-Through Architecture Optimizes
PCB Layout
D Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D EPIC(Enhanced-Performance Implanted
CMOS) 1-µm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
description
The ’AC16373 are 16-bit transparent D-type
latches with 3-state outputs designed specifically
for driving highly capacitive or relatively
low-impedance loads. They are particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers. The device can be used as two 8-bit
latches or one 16-bit latch. When the latch-enable
(LE) input is high, the Q outputs follow the data (D)
inputs. When LE is taken low, the Q outputs are
latched at the levels set up at the D inputs.
54AC16373 . . . WD PACKAGE
74AC16373 . . . DL PACKAGE
(TOP VIEW)
1OE 1
1Q1 2
1Q2 3
GND 4
1Q3 5
1Q4 6
VCC 7
1Q5 8
1Q6 9
GND 10
1Q7 11
1Q8 12
2Q1 13
2Q2 14
GND 15
2Q3 16
2Q4 17
VCC 18
2Q5 19
2Q6 20
GND 21
2Q7 22
2Q8 23
2OE 24
48 1LE
47 1D1
46 1D2
45 GND
44 1D3
43 1D4
42 VCC
41 1D5
40 1D6
39 GND
38 1D7
37 1D8
36 2D1
35 2D2
34 GND
33 2D3
32 2D4
31 VCC
30 2D5
29 2D6
28 GND
27 2D7
26 2D8
25 2LE
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without need for interface or pullup components. OE does not affect internal operations of the latch. Old
data can be retained or new data can be entered while the outputs are in the high-impedance state.
The 74AC16373 is packaged in TI’s shrink small-outline package (DL), which provides twice the I/O pin count
and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54AC16373 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74AC16373 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1996, Texas Instruments Incorporated
1
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