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54AC11020J View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
54AC11020J DUAL 4-INPUT POSITIVE-NAND GATES TI
Texas Instruments TI
54AC11020J Datasheet PDF : 5 Pages
1 2 3 4 5
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC(Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity
at 125°C
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
These devices contain two independent 4-input
NAND gates. They perform the Boolean functions
Y = A B C D or Y = A + B + C + D in positive
logic.
The 54AC11020 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The 74AC11020 is characterized for
operation from – 40°C to 85°C.
54AC11020, 74AC11020
DUAL 4-INPUT POSITIVE-NAND GATES
SCAS154 – MARCH 1987 – REVISED APRIL 1993
54AC11020 . . . J PACKAGE
74AC11020 . . . D OR N PACKAGE
(TOP VIEW)
1B 1
1A 2
1Y 3
GND 4
2Y 5
2D 6
2C 7
14 NC
13 1C
12 1D
11 VCC
10 2A
9 2B
8 NC
54AC11020 . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
NC 4
18 2B
NC 5
17 NC
1B 6
16 NC
NC 7
15 NC
1A 8
14 2C
9 10 11 12 13
NC – No internal connection
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A
B
C
D
Y
H
H
H
H
L
L
X
X
X
H
X
L
X
X
H
X
X
L
X
H
X
X
X
L
H
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1993, Texas Instruments Incorporated
2–1
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