Low-Cost, Low-Voltage, Quad, SPST,
CMOS Analog Switches
______________________________________________________________Pin Description
PIN
DIP/SO
QSOP
NAME
1, 3, 8, 11 1, 4, 9, 13 NO1–NO4
2, 4, 9, 10 2, 5, 10, 12 COM1–COM4
—
3, 11
N.C.
13, 5, 6, 12 15, 6, 7, 14
IN1–IN4
7
8
GND
14
16
V+
FUNCTION
Analog Switch Normally Open Terminal (bidirectional)
Analog Switch Common Terminal (bidirectional)
Not internally connected
Logic Control Inputs
Ground
Positive Supply Voltage
__________Applications Information
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
POSITIVE SUPPLY
mum ratings, because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ on first, followed by the logic
MAX4066
V+
MAX4066A
inputs. If power-supply sequencing is not possible, add
two small signal diodes in series with supply pins for
overvoltage protection (Figure 1). Adding diodes
reduces the analog signal range to 1V below V+ and
NO
COM
1V above GND, but low switch resistance and low leak-
age characteristics are unaffected. Device operation is
unchanged, and the difference between V+ and GND
Vg
should not exceed 17V.
Figure 1. Overvoltage Protection Using Two External Blocking
Diodes
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