K3326 View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

View to exact match

K3326

MOS FIELD EFFECT TRANSISTOR

NEC => Renesas Technology 

2SK3326

ELECTRICAL CHARACTERISTICS (TA = 25 °C)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Drain Leakage Current

IDSS

VDS = 500 V, VGS = 0 V

Gate to Source Leakage Current

IGSS

VGS = ±30 V, VDS = 0 V

Gate to Source Cut-off Voltage

VGS(off) VDS = 10 V, ID = 1 mA

Forward Transfer Admittance

| yfs | VDS = 10 V, ID = 5.0 A

Drain to Source On-state Resistance

RDS(on) VGS = 10 V, ID = 5.0 A

Input Capacitance

Ciss

VDS = 10 V, VGS = 0 V, f = 1 MHz

Output Capacitance

Coss

Reverse Transfer Capacitance

Crss

Turn-on Delay Time

Rise Time

td(on)

VDD = 150 V, ID = 5.0 A, VGS(on) = 10 V,

tr

RG = 10 Ω, RL = 60 Ω

Turn-off Delay Time

td(off)

Fall Time

tf

Total Gate Charge

QG

VDD = 400 V, VGS = 10 V, ID = 10 A

Gate to Source Charge

QGS

Gate to Drain Charge

QGD

Body Diode Forward Voltage

VF(S-D) IF = 10 A, VGS = 0 V

Reverse Recovery Time

trr

IF = 10 A, VGS = 0 V, di/dt = 50 A / µs

Reverse Recovery Charge

Qrr

MIN. TYP. MAX. UNIT

100 µA

±100 nA

2.5

3.5 V

2.0 4.0

S

0.68 0.85 Ω

1200

pF

190

pF

10

pF

21

ns

11

ns

40

ns

9.5

ns

22

nC

6.5

nC

7.5

nC

1.0

V

0.5

µs

2.6

µC

TEST CIRCUIT 1 AVALANCHE CAPABILITY

D.U.T.

RG = 25 Ω

L

PG.

50 Ω

VDD

VGS = 20 → 0 V

IAS

ID

VDD

BVDSS

VDS

Starting Tch

TEST CIRCUIT 3 GATE CHARGE

D.U.T.

IG = 2 mA

RL

PG.

50 Ω

VDD

TEST CIRCUIT 2 SWITCHING TIME

D.U.T.

PG.

RG

VGS

0

τ

τ = 1 µs

Duty Cycle ≤ 1 %

RL

VDD

VGS

VGS

Wave Form

10 %

0

ID

ID

Wave Form

0 10 %

VGS(on)

90 %

ID

90 %

90 %

10 %

td(on)

tr td(off)

tf

ton

toff

2

Data Sheet D14204EJ1V0DS00

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