K3224 View Datasheet(PDF) - NEC => Renesas Technology
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K3224 Datasheet PDF : 4 Pages
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ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Drain to Source On-state Resistance
RDS(on)1 VGS = 10 V, ID = 10 A
RDS(on)2 VGS = 4.0 V, ID = 10 A
Gate to Source Cut-off Voltage
VGS(off) VDS = 10 V, ID = 1 mA
Forward Transfer Admittance
| yfs | VDS = 10 V, ID = 10 A
Drain Leakage Current
IDSS
VDS = 60 V, VGS = 0 V
Gate to Source Leakage Current
IGSS
VGS = ±20 V, VDS = 0 V
Input Capacitance
Ciss
VDS = 10 V
Output Capacitance
Coss
VGS = 0 V
Reverse Transfer Capacitance
Crss
f = 1 MHz
Turn-on Delay Time
td(on)
ID = 10 A
Rise Time
tr
VGS(on) = 10 V
Turn-off Delay Time
td(off)
VDD = 30 V
Fall Time
tf
RG = 10 Ω
Total Gate Charge
QG
ID = 20 A
Gate to Source Charge
QGS
VDD = 48 V
Gate to Drain Charge
QGD
VGS(on) = 10 V
Body Diode Forward Voltage
VF(S-D) IF = 20 A, VGS = 0 V
Reverse Recovery Time
trr
If = 20 A, VGS = 0 V
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
2SK3224
MIN. TYP. MAX. UNIT
24 40 mΩ
33 60 mΩ
1.0 1.5 2.0 V
8.0 15
S
10 µA
±10 µA
790
pF
240
pF
100
pF
19
ns
165
ns
62
ns
71
ns
20
nC
3
nC
6.5
nC
0.93
V
40
ns
45
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = 20 → 0 V
IAS
ID
VDD
BVDSS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
PG.
RG
RG = 10 Ω
VGS
0
τ
τ = 1 µs
Duty Cycle ≤ 1 %
RL
VDD
VGS
VGS
Wave Form
10 %
0
ID
ID
Wave Form
0 10 %
VGS(on)
90 %
ID
90 %
90 %
10 %
td(on)
tr td(off)
tf
ton
toff
2
Data Sheet D13797EJ1V0DS00
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