K3116-S View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

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K3116-S

MOS FIELD EFFECT TRANSISTOR

NEC => Renesas Technology 

2SK3116

ELECTRICAL CHARACTERISTICS (TA = 25°C)

CHRACTERISTICS

SYMBOL

TEST CONDITIONS

Zero Gate Voltage Drain Current

IDSS VDS = 600 V, VGS = 0 V

Gate Leakage Current

IGSS VGS = ±30 V, VDS = 0 V

Gate Cut-off Voltage

Forward Transfer Admittance

Drain to Source On-state Resistance

VGS(off)

| yfs |

RDS(on)

VDS = 10 V, ID = 1 mA

VDS = 10 V, ID = 3.75 A

VGS = 10 V, ID = 3.75 A

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Turn-on Delay Time

Rise Time

Turn-off Delay Time

Fall Time

Total Gate Charge

Gate to Source Charge

Gate to Drain Charge

Body Diode Forward Voltage

Reverse Recovery Time

Ciss

Coss

Crss

td(on)

tr

td(off)

tf

QG

QGS

QGD

VF(S-D)

Trr

VDS = 10 V

VGS = 0 V

f = 1 MHz

VDD = 150 V, ID = 3.75 A

VGS = 10 V

RG = 10 Ω

RL = 50 Ω

VDD = 450 V

VGS = 10 V

ID = 7.5 A

IF = 7.5 A, VGS = 0 V

IF = 7.5 A, VGS = 0 V

Reverse Recovery Charge

Qrr di/dt = 50 A/ µs

MIN.

2.5

2.0

TYP.

0.9

1100

200

20

18

15

50

15

26

6

10

1.0

1.6

7.6

MAX.

100

±100

3.5

1.2

UNIT

µA

nA

V

S

Ω

pF

pF

pF

ns

ns

ns

ns

nC

nC

nC

V

µs

µC

TEST CIRCUIT 1 AVALANCHE CAPABILITY

D.U.T.

RG = 25 Ω

L

PG.

50 Ω

VDD

VGS = 20 → 0 V

IAS

ID

VDD

BVDSS

VDS

Starting Tch

TEST CIRCUIT 3 GATE CHARGE

D.U.T.

IG = 2 mA

RL

PG.

50 Ω

VDD

TEST CIRCUIT 2 SWITCHING TIME

D.U.T.

PG.

RG

RG = 10 Ω

VGS

0

τ

τ = 1 µs

Duty Cycle ≤ 1%

RL

VDD

VGS

VGS

Wave Form

10%

0

ID

VGS

90%

ID

Wave Form

0 10%

td(on)

ID

tr td(off)

90%

90%

10%

tf

ton

toff

2

Data Sheet D13339EJ2V0DS

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