K3062 View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

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K3062

MOS FIELD EFFECT TRANSISTOR

NEC => Renesas Technology 

2SK3062

ELECTRICAL CHARACTERISTICS (TA = 25 °C)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Zero Gate Voltage Drain Current

IDSS

VDS = 60 V, VGS = 0 V

Gate Leakage Current

IGSS

VGS = ±20 V, VDS = 0 V

Gate Cut-off Voltage

VGS(off) VDS = 10 V, ID = 1 mA

Forward Transfer Admittance

| yfs | VDS = 10 V, ID = 35 A

Drain to Source On-state Resistance

RDS(on)1 VGS = 10 V, ID = 35 A

RDS(on)2 VGS = 4.0 V, ID = 35 A

Input Capacitance

Ciss

VDS = 10 V

Output Capacitance

Coss

VGS = 0 V

Reverse Transfer Capacitance

Crss

f = 1 MHz

Turn-on Delay Time

td(on)

VDD = 30 V ,ID = 35 A

Rise Time

tr

VGS(on) = 10 V

Turn-off Delay Time

td(off)

RG = 10 Ω

Fall Time

tf

Total Gate Charge

QG

VDD = 48 V

Gate to Source Charge

QGS

VGS(on) = 10 V

Gate to Drain Charge

QGD

ID = 70 A

Body Diode Forward Voltage

VF(S-D) IF = 70 A, VGS = 0 V

Reverse Recovery Time

Reverse Recovery Charge

trr

IF = 70 A, VGS = 0 V

Qrr

di/dt = 100 A / µs

MIN. TYP. MAX. UNIT

10 µA

±10 µA

1.0 1.5 2.0 V

20 87

S

6.3 8.5 mΩ

8.2 12 mΩ

5200

pF

1300

pF

480

pF

75

ns

1150

ns

360

ns

480

ns

95

nC

13

nC

30

nC

0.97

V

70

ns

140

nC

TEST CIRCUIT 1 AVALANCHE CAPABILITY

D.U.T.

RG = 25 Ω

L

PG.

50 Ω

VDD

VGS = 20 → 0 V

ID

VDD

IAS BVDSS

VDS

Starting Tch

TEST CIRCUIT 3 GATE CHARGE

D.U.T.

IG = 2 mA

RL

PG.

50 Ω

VDD

TEST CIRCUIT 2 SWITCHING TIME

D.U.T.

RG

PG.

VGS

0

τ

τ = 1 µs

Duty Cycle ≤ 1%

RL

VGS

VGS

Wave Form

10%

0

VGS(on) 90%

VDD

ID

90%

ID

ID

0 10%

Wave Form

90%

10%

td(on) tr td(off) tf

ton

toff

2

Data Sheet D13101EJ2V0DS

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