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J248 View Datasheet(PDF) - Renesas Electronics

Part NameDescriptionManufacturer
J248 Silicon P Channel MOS FET Renesas
Renesas Electronics Renesas
J248 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
2SJ248
Main Characteristics
Power vs. Temperature Derating
30
20
10
0
0
50
100
150
Case Temperature Tc (°C)
Typical Output Characteristics
–20
–10 V –6 V
Pulse Test
–16
–4.5 V
–4 V
–12
–3.5 V
–8
–3 V
–4
VGS = –2.5 V
0
0
–4 –8 –12 –16 –20
Drain to Source Voltage VDS (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
–5
Pulse Test
–4
–3
ID = –10 A
–2
–5 A
–1
–2 A
0
0
–2
–4 –6
–8 –10
Gate to Source Voltage VGS (V)
Rev.2.00 Sep 07, 2005 page 3 of 6
Maximum Safe Operation Area
–50
–30
–10
–3
–1
–0.3
OtlihmpisietearadrDetiCboayOniPpsRWeinraD=tiSo1n0((omTncs)=1(12m1s5h0s°oC0t))µs
10 µs
–0.1 Ta = 25°C
–0.05
–1 –3 –10 –30 –100 –300 –1000
Drain to Source Voltage VDS (V)
Typical Transfer Characteristics
–10
VDS = –10 V
Pulse Test
–8
–25°C
–6
Tc = 75°C
25°C
–4
–2
0
0
–2 –4 –6 –8 –10
Gate to Source Voltage VGS (V)
Static Drain to Source on State Resistance
vs. Drain Current
5
Pulse Test
2
1
VGS = –4 V
0.5
–10 V
0.2
0.1
0.05
–0.5 –1 –2
–5 –10 –20 –50
Drain Current ID (A)
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