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24LC014T I2C? Serial EEPROM Family Data Sheet Microchip
Microchip Technology Microchip
24LC014T Datasheet PDF : 42 Pages
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24AAXX/24LCXX/24FCXX
5.7 Device Addressing For Devices
With Functional Address Pins
A control byte is the first byte received following the
Start condition from the master device (Figure 5-4).
The control byte begins with a 4-bit control code. For
the 24XX, this is set as ‘1010binary for read and write
operations. The next three bits of the control byte are
the Chip Select bits (A2, A1, A0). The Chip Select bits
allow the use of up to eight 24XX devices on the same
bus and are used to select which device is accessed.
The Chip Select bits in the control byte must corre-
spond to the logic levels on the corresponding A2, A1
and A0 pins for the device to respond. These bits are,
in effect, the three Most Significant bits of the word
address.
For 24XX128 and 24XX256 in the MSOP package, the
A0 and A1 pins are not connected. During device
addressing, the A0 and A1 Chip Select bits (Figure 5-4)
should be set to ‘0’. Only two 24XX128 or 24XX256
MSOP packages can be connected to the same bus.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’, a read operation is
selected. When set to a ‘0’, a write operation is
selected.
For higher density devices (24XX32 through
24XX512), the next two bytes received define the
address of the first data byte. Depending on the prod-
uct density, not all bits in the address high byte are
used. A15, A14, A13 and A12 are “don’t care” for
24XX32. A15, A14 and A13 are “don’t care” for
24XX64. A15 and A14 are “don’t care” for 24XX128.
A15 is “don’t care” for 24XX256. All address bits are
used for the 24XX512. The upper address bits are
transferred first, followed by the Less Significant bits.
Following the Start condition, the 24XX monitors the
SDA bus. Upon receiving a ‘1010code, appropriate
device select bits and the R/W bit, the slave device out-
puts an Acknowledge signal on the SDA line. The
address byte(s) follow the acknowledge.
FIGURE 5-4:
CONTROL AND ADDRESS BYTE ASSIGNMENTS FOR
DEVICES WITH ADDRESS PINS
Control Byte
Address Byte
24C01C S 1 0 1 0 A2 A1 A0 R/W ACK
24C02C S 1 0 1 0 A2 A1 A0 R/W ACK
24XX024/025 S 1 0 1 0 A2 A1 A0 R/W ACK
x A6 . . . . . A0
A7 . . . . . . A0
A7 . . . . . . A0
Control Byte
Address High Byte
24XX32 S 1 0 1 0 A2 A1 A0 R/W ACK
24XX64 S 1 0 1 0 A2 A1 A0 R/W ACK
24XX128 S 1 0 1 0 A2 A1 A0 R/W ACK
24XX256 S 1 0 1 0 A2 A1 A0 R/W ACK
24XX512 S 1 0 1 0 A2 A1 A0 R/W ACK
x
x x x A11 A10 A9 A8
x
x x A12 A11 A10 A9 A8
x
x A13 A12 A11 A10 A9 A8
x A14 A13 A12 A11 A10 A9 A8
A15 A14 A13 A12 A11 A10 A9 A8
Control Code Chip Select bits*
Start bit
Acknowledge
bit
Read/Write bit
(Read = 1, Write = 0)
Address Low Byte
A7 . . . . . . A0
A7 . . . . . . A0
A7 . . . . . . A0
A7 . . . . . . A0
A7 . . . . . . A0
x = “don’t care” bit
* Chip Select bits A1 and A0 must be set to ‘0’ for 24XX128/256 devices in the MSOP package.
DS21930B-page 14
© 2007 Microchip Technology Inc.
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