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FIN1022MX View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
FIN1022MX
Fairchild
Fairchild Semiconductor Fairchild
FIN1022MX Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Required Specifications
1. When the true and complement LVDS outputs (having
a 75connected between outputs) are connected to
3.75 kresistors and the common point of those 3.75
kresistors are connected to a voltage source that
sweeps from 0 to 2.4V, the DC VOD and VOD are still
maintained (see Figure 1).
2. When the true and complement LVDS outputs (having
a 5 pF capacitor attached between outputs) are con-
nected with 37.5resistors each to common point,
then the common point does not vary by more than 150
mV under all process, temperature and voltage condi-
tions when the outputs switch either from LOW-to-
HIGH or from HIGH-to-LOW (see Figure 2).
3. Pull-down resistors are required on Enable (EN0 and
EN1) and select (SEL0 and SEL1) inputs.
4. Fail safe protection on the outputs that draw less than
20 µA of current (worst case) on the LVDS inputs. In
this condition, if the input is in fail safe selected to
OUT0+/OUT0(say) and the outputs are Enabled then
OUT0+ = HIGH and OUT0= LOW. This prevents noise
from being amplified when the connection is broken.
5. In the disabled state the outputs can go beyond VCC
but there should be no appreciable leakage (see IOZD
and IOFF specifications)
FIGURE 1. Common Mode Supply Test Circuit
FIGURE 2. Dynamic VOS Test Circuit and Waveforms
5
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