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ST24C04 View Datasheet(PDF) - STMicroelectronics

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Description
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ST24C04
ST-Microelectronics
STMicroelectronics ST-Microelectronics
ST24C04 Datasheet PDF : 17 Pages
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Figure 5. AC Waveforms
ST24/25C04, ST24/25W04
SCL
SDA IN
tCHCL
tCLCH
tDLCL
tDXCX
tCHDX
START
CONDITION
tCLDX
SDA
SDA
INPUT CHANGE
SCL
SDA OUT
tCLQV
DATA VALID
tCLQX
DATA OUTPUT
tCHDH
tDHDL
STOP &
BUS FREE
SCL
SDA IN
tCHDH
STOP
CONDITION
tW
WRITE CYCLE
tCHDX
START
CONDITION
AI00795B
Write Operations
The Multibyte Write mode (only available on the
ST24/25C04 versions) is selected when the MODE
pin is at VIH and the Page Write mode when MODE
pin is at VIL. The MODE pin may be driven dynami-
cally with CMOS input levels.
Following a START condition the master sends a
device select code with the RW bit reset to ’0’. The
memory acknowledges this and waits for a byte
address. The byte address of 8 bits provides ac-
cess to one block of 256 bytes of the memory. After
receipt of the byte address the device again re-
sponds with an acknowledge.
For the ST24/25W04 versions, any write command
with WC = 1 will not modify the memory content.
Byte Write. In the Byte Write mode the master
sends one data byte, which is acknowledged by the
memory. The master then terminates the transfer
by generating a STOP condition. The Write mode
is independant of the state of the MODE pin which
could be left floating if only this mode was to be
used. However it is not a recommended operating
mode, as this pin has to be connected to either VIH
or VIL, to minimize the stand-by current.
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