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O9039A385IZWSRQ1 Automotive Power Management Unit (PMU) for Processor TI
Texas Instruments TI
O9039A385IZWSRQ1 Datasheet PDF : 109 Pages
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TPS659038-Q1, TPS659039-Q1
SWCS095K – AUGUST 2013 – REVISED JANUARY 2018
OVER_TEMP
SMPS_SHORT_STATUS
SMPS_THERMAL_STATUS
INT2_MASK[6]
ILIM
SMPS12 POWERGOOD
SMPS3
SMPS_POWERGOOD_MASK1[0]
SMPS_POWERGOOD_MASK1[1]
SMPS_POWERGOOD_MASK1[7]
www.ti.com
INT
POWERGOOD
External SMPS (trrough GPIO7)
SMPS_POWERGOOD_MASK2[2]
Figure 6-4. POWERGOOD Block Diagram
6.3.2.1.5 DVS-Capable Regulators
The step-down converters SMPS12 or SMPS123, SMPS45 or SMPS457, SMPS6, and SMPS8 are DVS-
capable and have some additional parameters for control. The slew rate of the output voltage during
voltage level change is fixed at 2.5 mV/µs. The control for two different voltage levels (ROOF and FLOOR)
with the NSLEEP and ENABLE1 signals is available. When the ROOF_FLOOR control is not used, two
different voltage levels can be selected with the CMD bit in the SMPSx_FORCE register.
• The output voltage slew rate for achieving new output voltage value is fixed at 2.5 mV/μs.
• The NSLEEP and ENABLE1 terminals can be used for roof-floor control of SMPS. For roof-floor
operation sets the SMPSx_CTRL.ROOF_FLOOR_EN register, and assign SMPS to NSLEEP and
ENABLE1 in the NSLEEP_SMPS_ASSIGN and ENABLE1_SMPS_ASSIGN registers. When the
controlling terminal is active, the SMPS output value is defined by the SMPSx_VOLTAGE register.
When the controlling terminal is not active, the SMPS output value is defined by the SMPSx_FORCE
register.
• Set the second value for the output voltage with the SMPSx_FORCE.VSEL register. A value of 0x0
disables the SMPS (OFF).
• Select which register, SMPSx_VOLTAGE or SMPSx_FORCE, to use with the SMPSx_FORCE.CMD
bit. The default is the voltage setting of SMPSx_VOLTAGE. For the CMD bit to work, ensure that
SMPSx_CTRL.ROOF_FLOOR_EN = 0.
Figure 6-5 shows the SMPS controls for DVS.
44
Detailed Description
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