THEORY OF OPERATION
The ADR42x series of references uses a new reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFET), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified and
used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about –120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be closely compensated by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate bandgap references. The big advantage
over a bandgap reference is that the intrinsic temperature
coefficient is some thirty times lower (therefore requiring less
correction), resulting in much lower noise since most of the
noise of a bandgap reference comes from the temperature
Figure 1 shows the basic topology of the ADR42x series. The
temperature correction term is provided by a current source with a
value designed to be proportional to absolute temperature. The
general equation is:
VOUT = G × (∆VP − R1 × IPTAT )
where G is the gain of the reciprocal of the divider ratio, ∆VP is
the difference in pinch-off voltage between the two JFETs, and
IPTAT is the positive temperature coefficient correction current.
ADR42x are created by on-chip adjustment of R2 and R3 to
achieve 2.048 V or 2.500 V at the reference output respectively.
*EXTRA CHANNEL IMPLANT
VOUT = G(⌬VP – R1 ؋ IPTAT)
Figure 1. Simplified Schematic
Device Power Dissipation Considerations
The ADR42x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.5 V
to 18 V. When these devices are used in applications at higher
current, users should account for the temperature effects due to
the power dissipation increases with the following equation:
TJ = PD × θJA + TA
where TJ and TA are the junction and ambient temperatures,
respectively, PD is the device power dissipation, and θJA is the
device package thermal resistance.
Basic Voltage Reference Connections
Voltage references, in general, require a bypass capacitor
connected from VOUT to GND. The circuit in Figure 2
illustrates the basic configuration for the ADR42x family of
references. Other than a 0.1 µF capacitor at the output to help
improve noise suppression, a large output capacitor at the
output is not required for circuit stability.
2 ADR42x 7 NIC
NIC 3 TOP VIEW 6
(Not to Scale)
NIC = NO INTERNAL CONNECTION
TP = TEST PIN
(DO NOT CONNECT)
Figure 2. Basic Voltage Reference Configuration
The noise generated by the ADR42x family of references is
typically less than 2 µV p-p over the 0.1 Hz to 10 Hz band
for ADR420, ADR421, and ADR423. TPC 22 shows the 0.1
Hz to 10 Hz noise of the ADR421, which is only 1.75 µV p-p.
The noise measurement is made with a bandpass filter made of
a 2-pole high-pass filter with a corner frequency at 0.1 Hz and
a 2-pole low-pass filter with a corner frequency at 10 Hz.
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. TPC 29 through TPC 33, inclusive, show the turn-on
settling time for the ADR421.
The ADR42x trim terminal can be used to adjust the output voltage
over a ± 0.5% range. This feature allows the system designer to
trim system errors out by setting the reference to a voltage other
than the nominal. This is also helpful if the part is used in a system
at temperature to trim out any error. Adjustment of the output has
negligible effect on the temperature performance of the device.
To avoid degrading temperature coefficient, both the trimming
potentiometer and the two resistors need to be low temperature
coefficient types, preferably <100 ppm/°C.
VO = ؎0.5%
Figure 3. Output Trim Adjustment