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K1859 Просмотр технического описания (PDF) - Renesas Electronics

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K1859 Silicon N-Channel MOS FET / TO-3PFM Renesas
Renesas Electronics Renesas
K1859 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
2SK1859
Static Drain to Source on State
Resistance vs. Temperature
10
VGS = 10 V
Pulse Test
8
6
ID = 5 A
2A
4
1A
2
0
–40 0
40
80 120 160
Case Temperature TC (°C)
Body to Drain Diode Reverse
Recovery Time
5,000
di/dt = 100 A/µs, Ta = 25°C
2,000 VGS = 0
Pulse Test
1,000
500
200
100
50
0.1 0.2 0.5 1 2
5 10
Reverse Drain Current IDR (A)
Dynamic Input Characteristics
1,000
20
800 VDD = 250 V
16
400 V
600 V
600
12
VDS
VGS
400
8
200
600 V ID = 6 A
4
400 V
VDD = 250 V
0
0
20 40 60 80 100
Gate Charge Qg (nc)
Forward Transfer Admittance
vs. Drain Current
10
–25°C
5
TC = 25°C
75°C
2
1
0.5
0.2
VDS = 20 V
Pulse Test
0.1
0.05 0.1 0.2 0.5 1 2
5
Drain Current ID (A)
Typical Capacitance vs.
Drain to Source Voltage
10,000
VGS = 0
f = 1 MHz
1,000
Ciss
Coss
100
Crss
10
0
10 20 30 40 50
Drain to Source Voltage VDS (V)
Switching Characteristics
500
VGS = 10 V, VDD =.. 30 V
PW = 2 µs, duty < 1%
200
td (off)
100
tf
tr
50
td (on)
20
10
5
0.1 0.2 0.5 1 2
5 10
Drain Current ID (A)
Rev.2.00 Sep 07, 2005 page 4 of 6
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